Renesas RX100 Series User Manual page 677

32-bit mcu
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Figure 23.43 shows a sample flowchart for serial data reception.
Figure 23.43
Sample Smart Card Interface Reception Flowchart
All the processing steps are automatically performed using an RXI interrupt request to activate the DTC.
In reception, setting the RIE bit to 1 allows an RXI interrupt request to be generated. The DTC is activated by an RXI
interrupt request if the RXI interrupt request is specified as a source of DTC activation beforehand, allowing transfer of
receive data.
If an error occurs during reception and either the ORER or PER flag in the SSR register is set to 1, a receive error
interrupt (ERI) request is generated. Clear the error flag after the error occurrence. If an error occurs, the DTC is not
activated and receive data is skipped. Therefore, the number of bytes of receive data specified in the DTC is transferred.
Even if a parity error occurs and the PER flag is set to 1 during reception, receive data is transferred to RDR, thus
allowing the data to be read.
When a reception is forcibly terminated by setting the SCR.RE bit to 0 during operation, read the RDR register because
the received data which has not yet been read may be left in RDR.
Note 1. For operations in block transfer mode, refer to section 23.3, Operation in Asynchronous Mode.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Start
Initialization
Start data reception
SSR.ORER = 0 and
SSR.PER = 0?
Yes
No
RXI interrupt
Yes
Read data from RDR
No
All data received?
Yes
Set bits RIE and RE
in SCR to 0
23. Serial Communications Interface (SCIg, SCIh)
No
Error processing
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