Renesas RX100 Series User Manual page 210

32-bit mcu
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RX13T Group
 When the IWDT underflow/refresh error interrupt is generated while this interrupt is enabled at its source.
[Clearing condition]
 When 1 is written to the NMICLR.IWDTCLR bit
LVD1ST Flag (Voltage Monitoring 1 Interrupt Status Flag)
This flag indicates the request for voltage monitoring 1 interrupt.
The LVD1ST flag is read-only, and cleared by the NMICLR.LVD1CLR bit.
[Setting condition]
 When the voltage monitoring 1 interrupt is generated while this interrupt is enabled at its source.
[Clearing condition]
 When 1 is written to the NMICLR.LVD1CLR bit
LVD2ST Flag (Voltage Monitoring 2 Interrupt Status Flag)
This flag indicates the request for voltage monitoring 2 interrupt.
The LVD2ST flag is read-only, and cleared by the NMICLR.LVD2CLR bit.
[Setting condition]
 When the voltage monitoring 2 interrupt is generated while this interrupt is enabled at its source.
[Clearing condition]
 When 1 is written to the NMICLR.LVD2CLR bit
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
14. Interrupt Controller (ICUb)
Page 210 of 1041

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