Renesas RX100 Series User Manual page 597

RX13T Group
(2) Smart Card Interface Mode (SCMR.SMIF = 1)
Address(es): SMCI1.SCR 0008 A022h, SMCI5.SCR 0008 A0A2h, SMCI12.SCR 0008 B302h
b7 b6
TIE RIE
0 0
Value after reset:
Bit Symbol Bit Name
b1, b0 CKE[1:0] Clock Enable
b2 TEIE Transmit End Interrupt Enable
b3 MPIE Multi-Processor Interrupt Enable
b4 RE Receive Enable
b5 TE Transmit Enable
b6 RIE Receive Interrupt Enable
b7 TIE Transmit Interrupt Enable
x: Don't care
Note 1. Writable only when TE = 0 and RE = 0.
Note 2. 1 can be written only when TE = 0 and RE = 0. After setting TE or RE to 1, only 0 can be written in TE and RE.
For details on interrupt requests, refer to section 23.12, Interrupt Sources .
CKE[1:0] Bits (Clock Enable)
These bits control the clock output from the SCKn pin.
In GSM mode, clock output can be dynamically switched. For details, refer to section 23.6.8, Clock Output Control .
TEIE Bit (Transmit End Interrupt Enable)
This bit should be 0 in smart card interface mode.
MPIE Bit (Multi-Processor Interrupt Enable)
This bit should be 0 in smart card interface mode.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
TE RE MPIE TEIE
0 0 0 0
Description
 When SMR.GM = 0
 When SMR.GM = 1
This bit should be 0 in smart card interface mode.
This bit should be 0 in smart card interface mode.
0: Serial reception is disabled
1: Serial reception is enabled
0: Serial transmission is disabled
1: Serial transmission is enabled
0: RXI and ERI interrupt requests are disabled
1: RXI and ERI interrupt requests are enabled
0: A TXI interrupt request is disabled
1: A TXI interrupt request is enabled
23. Serial Communications Interface (SCIg, SCIh)
b1 b0
CKE[1:0]
0 0
b1 b0
0 0: Output disabled
The SCKn pin becomes high-impedance.
0 1: Clock output
1 x: Setting prohibited
b1 b0
0 0: Output fixed low
x 1: Clock output
1 0: Output fixed high
R/W
1
R/W*
R/W
R/W
2
R/W*
2
R/W*
R/W
R/W
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