Renesas RX100 Series User Manual page 602

RX13T Group
(2) Smart Card Interface Mode (SCMR.SMIF = 1)
Address(es): SMCI1.SSR 0008 A024h, SMCI5.SSR 0008 A0A4h, SMCI12.SSR 0008 B304h
b7 b6
TDRE RDRF ORER
1 0
Value after reset:
Bit Symbol Bit Name
b0 MPBT Multi-Processor Bit Transfer
b1 MPB Multi-Processor
b2 TEND Transmit End Flag
b3 PER Parity Error Flag
b4 ERS Error Signal Status Flag
b5 ORER Overrun Error Flag
b6 RDRF Receive Data Full Flag
b7 TDRE Transmit Data Empty Flag
Note 1. Only 0 can be written to this bit, to clear the flag. To clear this flag, confirm that the flag is 1 and then set it to 0.
Note 2. Write 1 when writing is necessary.
TEND Flag (Transmit End Flag)
With no error signal from the receiving side, this bit is set to 1 when further data for transfer is ready to be transferred to
the TDR register.
[Setting conditions]
 When the SCR.TE bit = 0 (serial transmission is disabled)
When the SCR.TE bit is changed from 0 to 1, the TEND flag is not affected and retains the value 1.
 When a specified period has elapsed after the latest transmission of 1 byte, the ERS flag is 0, and the TDR register
is not updated
The set timing is determined by register settings as listed below.
When SMR.GM = 0 and SMR.BLK = 0, 12.5 etu after the start of transmission
When SMR.GM = 0 and SMR.BLK = 1, 11.5 etu after the start of transmission
When SMR.GM = 1 and SMR.BLK = 0, 11.0 etu after the start of transmission
When SMR.GM = 1 and SMR.BLK = 1, 11.0 etu after the start of transmission
[Clearing condition]
 When transmit data are written to the TDR register while the SCR.TE bit is 1
When setting the TEND flag to 0 to complete the interrupt handling, refer to section 14.4.1.2, Operation of
Status Flags for Level-Detected Interrupts .
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
ERS PER TEND
0 0 0 1
Description
This bit should be set to 0 in smart card interface mode.
This bit is not used in smart card interface mode. It should be set
to 0.
0: A character is being transmitted.
1: Character transfer has been completed.
0: No parity error occurred
1: A parity error has occurred
0: Low error signal not responded
1: Low error signal responded
0: No overrun error occurred
1: An overrun error has occurred
0: No valid data is held in the RDR register
1: Received data is held in the RDR register
0: Data to be transmitted is held in the TDR register
1: No data is held in the TDR register
23. Serial Communications Interface (SCIg, SCIh)
b1 b0
MPB MPBT
0 0
R/W
R/W
R
R
R/(W)
1
*
R/(W)
1
*
R/(W)
* 1
R/(W)
2
*
R/(W)
2
*
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