31.13 Usage Notes - Renesas RX100 Series User Manual

RX13T Group

31.13 Usage Notes

(1) Access the Block Where Erase Operation is Forcibly Stopped
When forcibly stopping an erase operation, data in the block where the erase operation is aborted is undefined. To
avoid malfunctions caused by reading undefined data, do not execute instructions or read data in the block where an
erase operation is forcibly stopped.
(2) Processing After Forced Stop of Erase Operation
When an erase operation is forcibly stopped, issue a block erase command again to the same block.
(3) Additional Programming Disabled
The same address cannot be programmed more than once. When programming an area that has been already
programmed, erase the area first.
(4) Reset during Program/Erase
If inputting a reset from the RES# pin, release the reset after reset input time of at least tRESW (refer to section 32,
Electrical Characteristics ) within the range of the operating voltage defined in the electrical characteristics.
The IWDT reset and software reset can be used regardless of tRESW.
(5) Non-maskable Interrupt Disabled during Program/Erase
When a non-maskable interrupt (NMI pin interrupt, oscillation stop detection interrupt, IWDT underflow/refresh
error, voltage monitoring 1 interrupt, or voltage monitoring 2 interrupt) occurs during a program/erase operation,
the vectors are fetched from the ROM, and undefined data is read. Therefore, do not generate a non-maskable
interrupt during a program/erase operation on the ROM.
(The description in (5) applies only to the ROM.)
(6) Location of Interrupt Vectors during a Program/Erase Operation
When an interrupt occurs during a program/erase operation, the vector may be fetched from the ROM. To avoid
fetching the vector from the ROM, set the destination for fetching interrupt vectors to an area other than the ROM
with the CPU interrupt table register (INTB).
(7) Abnormal Termination during Program/Erase
When the voltage exceeds the range of the operating voltage during a program/erase operation or when a
program/erase operation is not completed successfully due to a reset or prohibited actions described in (8), erase the
area again.
(8) Actions Prohibited during Program/Erase
To prevent the damage to the flash memory, comply with the following instructions.
 Do not use the MCU power supply that is outside the operating voltage range.
 Do not update the value of the OPCCR.OPCM[2:0] bits.
 Do not change the clock source select bit in the SCKCR3 register.
 Do not change the division ratio of the flash interface clock (FCLK).
 Do not place the MCU in deep sleep mode or software standby mode.
 Do not access the E2 DataFlash during a program/erase operation to the ROM.
 Do not change the DFLCTL.DFLEN bit value during a program/erase operation to the E2 DataFlash.
(9) FCLK during Program/Erase
For programming/erasure by self-programming, set the frequency of the FlashIF clock (FCLK), and specify an
integer FCLK frequency (MHz) in FISR.PCKA[4:0] bits. Note that when the FCLK is 4 to 32 MHz, a rounded-up
value should be set for a non-integer frequency such as 12.5 MHz (i.e. 12.5 MHz should be set rounded up to
13 MHz). If the FCLK is equal to or less than 4 MHz, only 1, 2, 3, or 4 MHz can be used.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
31. Flash Memory (FLASH)
Page 986 of 1041