Renesas RX100 Series User Manual page 168

RX13T Group
Table 11.2 Operating Conditions of Each Power Consumption Mode
Entry trigger
Exit trigger
After exiting from each mode, CPU
2
begins from*
Main clock oscillator
High-speed on-chip oscillator
Low-speed on-chip oscillator
IWDT-dedicated on-chip oscillator
PLL
CPU
RAM0 (0000 0000h to 0000 2FFFh)
DTC
Flash memory
Independent watchdog timer (IWDT)
Voltage detection circuit (LVD)
Power-on reset circuit
Peripheral modules
I/O ports
Comparator C
"Operating possible" means that operating or stopped can be controlled by the register setting.
"Stopped (Retained)" means that internal register values are retained and internal operations are suspended.
Note 1. "Interrupts" here indicates an external pin interrupt (the NMI or IRQ0 to IRQ5) or any of peripheral interrupts (the IWDT, and
voltage monitoring interrupts).
Note 2. This does not include a RES# pin reset, power-on reset, voltage monitoring reset, or independent watchdog-timer reset. One of
these reset sources initiate transition to reset state.
Note 3. Operating or stopping is selected by setting the IWDT sleep mode count stop control bit (IWDTSLCSTP) in option function
select register 0 (OFS0) in IWDT auto-start mode. In any mode other than IWDT auto-start mode, operating or stopping is
selected by the setting of the sleep mode count stop control bit (SLCSTP) in the IWDT count stop control register
(IWDTCSTPR).
Note 4. The peripheral logic states are retained.
Note 5. During sleep mode, do not write to the system control related registers (indicated by 'SYSTEM' in the Module Symbol column in
Table 5.1, List of I/O Registers (Address Order).
Note 6. Using the digital filter function is prohibited. Operation for outputting the comparison result to the COMPn pin is possible.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Sleep Mode
Control register + instruction
Interrupt
Interrupt handling
Operating possible
Operating possible
Operating possible
3
Operating possible*
Operating possible
Stopped (Retained)
Operating possible (Retained)
5
Operating possible*
Operating
3
Operating possible*
Operating possible
Operating
Operating possible
Operating
Operating possible
Deep Sleep Mode
Control register + instruction
Interrupt
Interrupt handling
Operating possible
Operating possible
Operating possible
3
Operating possible*
Operating possible
Stopped (Retained)
Stopped (Retained)
Stopped (Retained)
Stopped (Retained)
3
Operating possible*
Operating possible
Operating
Operating possible
Operating
Operating possible
11. Low Power Consumption
Software Standby Mode
Control register + instruction
1
Interrupt*
Interrupt handling
Stopped
Stopped
Stopped
3
Operating possible*
Stopped
Stopped (Retained)
Stopped (Retained)
Stopped (Retained)
Stopped (Retained)
3
Operating possible*
Operating possible
Operating
4
Stopped (Retained)*
Retained
6
Operating possible*
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