Renesas RX100 Series User Manual page 21

23.2.37 Timer Mode Register (TMR) ................................................................................................... 634
23.2.38 Timer Prescaler Register (TPRE) ............................................................................................. 635
23.2.39 Timer Count Register (TCNT) ................................................................................................. 635
23.3 Operation in Asynchronous Mode ..................................................................................................... 636
23.3.1 Serial Data Transfer Format ..................................................................................................... 636
23.3.2 Receive Data Sampling Timing and Reception Margin in Asynchronous Mode .................... 638
23.3.3 Clock ......................................................................................................................................... 639
23.3.4 Double-Speed Mode ................................................................................................................. 639
23.3.5 CTS and RTS Functions ........................................................................................................... 640
23.3.6 SCI Initialization (Asynchronous Mode) ................................................................................. 641
23.3.7 Serial Data Transmission (Asynchronous Mode) ..................................................................... 643
23.3.8 Serial Data Reception (Asynchronous Mode) .......................................................................... 647
23.4 Multi-Processor Communications Function ...................................................................................... 651
23.4.1 Multi-Processor Serial Data Transmission ............................................................................... 652
23.4.2 Multi-Processor Serial Data Reception .................................................................................... 653
23.5 Operation in Clock Synchronous Mode ............................................................................................ 656
23.5.1 Clock ......................................................................................................................................... 656
23.5.2 CTS and RTS Functions ........................................................................................................... 657
23.5.3 SCI Initialization (Clock Synchronous Mode) ......................................................................... 658
23.5.4 Serial Data Transmission (Clock Synchronous Mode) ............................................................ 659
23.5.5 Serial Data Reception (Clock Synchronous Mode) .................................................................. 663
23.5.6 Simultaneous Serial Data Transmission and Reception (Clock Synchronous Mode) .............. 666
23.6 Operation in Smart Card Interface Mode .......................................................................................... 667
23.6.1 Sample Connection ................................................................................................................... 667
23.6.2 Data Format (Except in Block Transfer Mode) ........................................................................ 668
23.6.3 Block Transfer Mode ................................................................................................................ 669
23.6.4 Receive Data Sampling Timing and Reception Margin ........................................................... 670
23.6.5 SCI Initialization (Smart Card Interface Mode) ....................................................................... 671
23.6.6 Serial Data Transmission (Except in Block Transfer Mode) ................................................... 673
23.6.7 Serial Data Reception (Except in Block Transfer Mode) ......................................................... 676
23.6.8 Clock Output Control ............................................................................................................... 678
23.7 Operation in Simple I
23.7.1 Generation of Start, Restart, and Stop Conditions .................................................................... 680
23.7.2 Clock Synchronization ............................................................................................................. 682
23.7.3 SSDA Output Delay ................................................................................................................. 683
23.7.4 SCI Initialization (Simple I
23.7.5 Operation in Master Transmission (Simple I
23.7.6 Master Reception (Simple I
23.7.7 Recovery from Bus Hang-up .................................................................................................... 689
23.8 Operation in Simple SPI Mode .......................................................................................................... 690
23.8.1 States of Pins in Master and Slave Modes ................................................................................ 691
2
C Mode .......................................................................................................... 679
2
C Mode) ....................................................................................... 684
2
C Mode) ...................................................................................... 687
2
C Mode) ........................................................... 685