Renesas RX100 Series User Manual page 701

RX13T Group
Set 1 to STCR.PIBDCL
Figure 23.65 Sample Flowchart for Reception of a Start Frame (2)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
B
Set 1 to TCR.TCST
Set 1 to CR3.SDST
STR.BFDF = 1?
Yes
Set 1 to STCR.BFDCL
STR.CF0MF = 1?
Yes
Set 1 to STCR.CF0MCL
Yes
STR.PIBDF = 1?
No
STR.CF1MF = 1?
Yes
Set 1 to STCR.CF1MCL
Information Frame communications
23. Serial Communications Interface (SCIg, SCIh)
Start the timer counter so that determining the
Break Field is possible.
Begin detection of the Start Frame.
The STR.BFDF flag is set to 1 on detection of the
No
Break Field low width. At this time, if the ICR.BFDIE
bit is 1, an SCIX0 interrupt is generated.
Clear the STR.BFDF flag.
If the data received in Control Field 0 matches the
No
comparison data, the STR.CF0MF flag is set. An
SCIX1 interrupt is also generated if the value of the
ICR.CF0MIE bit is 1.
Clear the STR.CF0MF flag.
If there is a match with the priority interrupt bit in
Control Field 1, the STR.PIBDF flag becomes 1. An
SCIX1 interrupt is also generated if the value of the
ICR.PIBDIE bit is 1.
If there is a match with the data received in Control
Field 1, the STR.CF1MF flag is set. An SCIX1
No
interrupt is also generated if the value of the
ICR.CF1MIE bit is 1.
Clear the CF1MF and PIBDF flags in the STR
register.
Send the Information Frame.
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