Forced Stop Of Software Commands; Interrupt - Renesas RX100 Series User Manual

RX13T Group
31.7.4.6

Forced Stop of Software Commands

Perform the procedure shown in Figure 31.19 to forcibly stop the blank check command or block erase command.
When the command processing is forcibly stopped, registers FEAMH and FEAML store the address at the time of the
forced stop. For blank check, the stopped processing can be continued by copying the FEAMH and FEAML register
values to registers FSARH and FSARL.
Figure 31.19 Procedure for Forced Stop of Software Commands
31.7.5

Interrupt

When software command processing or forced stop processing is completed, an interrupt (FRDYI) is generated.
When the FSTATR1.FRDY flag becomes 0 by setting the FCR.OPST bit to 0 and the FSTATR1.EXRDY flag becomes 0
by setting the FEXCR.OPST bit to 0, the next interrupt (FRDYI) can be accepted.
Clear the IRn.IR flag before setting the IERm.IEN bit of the ICU corresponding to this interrupt.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Command is being executed
FCR.STOP bit = 1
FSTATR1.FRDY flag = 1?
Yes
FCR register = 00h
FSTATR1.FRDY flag = 0?
Yes
End
31. Flash Memory (FLASH)
No
No
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