Flash Processing End Address Register H (Fearh); Flash Processing End Address Register L (Fearl) - Renesas RX100 Series User Manual

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31.4.13

Flash Processing End Address Register H (FEARH)

Address(es): FLASH.FEARH 007F FF88h
b7
b6
0
0
Value after reset:
The FEARH register is used to set the end address of the target processing range in the flash memory when a software
command is executed.
Set bit 19 to bit 16 of the flash memory address for programming/erasure in this register.
Data can be written to this register in ROM P/E mode or E2 DataFlash P/E mode.
This register is initialized by a reset or setting the FRESETR.FRESET bit to 1. Data cannot be written to this register
while the FRESETR.FRESET bit is 1.
If this register is read while executing a software command set by the FEXCR register, an undefined value is read.
Refer to Figure 31.1 and Figure 31.2 for details on the addresses of the flash memory.
31.4.14

Flash Processing End Address Register L (FEARL)

Address(es): FLASH.FEARL 007F FF86h
b15
b14
0
0
Value after reset:
The FEARH register is used to set the end address of the target range for processing when a software command is
executed.
Set bit 15 to bit 0 of the flash memory address for programming/erasure in this register.
When the target is the ROM, set bit 1 and bit 0 to 00b.
Data can be written to this register in ROM P/E mode or E2 DataFlash P/E mode.
This register is initialized by a reset or setting the FRESETR.FRESET bit to 1. Data cannot be written to this register
while the FRESETR.FRESET bit is 1.
If this register is read while executing a software command set by the FEXCR register, an undefined value is read.
Refer to Figure 31.1 and Figure 31.2 for details on the addresses of the flash memory.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5
b4
b3
b2
0
0
0
0
b13
b12
b11
b10
0
0
0
0
b1
b0
0
0
b9
b8
b7
b6
0
0
0
0
31. Flash Memory (FLASH)
b5
b4
b3
b2
0
0
0
0
Page 921 of 1041
b1
b0
0
0

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