Software Interrupt Generation Register (Swintr) - Renesas RX100 Series User Manual

RX13T Group
14.2.5

Software Interrupt Generation Register (SWINTR)

Address(es): ICU.SWINTR 0008 72E0h
b7 b6
— —
Value after reset: 0 0
Bit Symbol Bit Name
b0 SWINT Software Interrupt Generation
b7 to b1 — Reserved
Note 1. Only 1 can be written.
SWINT Bit (Software Interrupt Generation)
When 1 is written to the SWINT bit, the interrupt request register 027 (IR027) is set to 1.
If 1 is written to the SWINT bit when the DTC transfer request enable register 027 (DTCER027) is set to 0, an interrupt
to the CPU is generated.
If 1 is written to the SWINT bit when the DTC transfer request enable register 027 (DTCER027) is set to 1, a DTC
transfer request is issued.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
— — — —
0 0 0 0
Description
This bit is read as 0. Writing 1 issues a software interrupt request.
Writing 0 to this bit has no effect.
These bits are read as 0. The write value should be 0.
b1 b0
— SWINT
0 0
14. Interrupt Controller (ICUb)
R/W
R/(W)
* 1
R/W
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