Renesas RX100 Series User Manual page 69

32-bit mcu
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RX13T Group
Figure 2.10 to Figure 2.14 show the operation of instructions that are converted into basic multiple micro-operations.
Note:
mop: Micro-operation, stall: Pipeline stall
ADD [R1], R2
Figure 2.10
Arithmetic/Logic Instruction (Memory Source Operand)
MOV [R1], [R2]
Figure 2.11
MOV Instruction (Memory-Memory), Bit Manipulation Instruction (Memory Source Operand)
EMUL R2, R4
Figure 2.12
EMUL, EMULU Instructions (Register- Register, Register-Immediate)
XCHG R1, R2
Figure 2.13
XCHG Instruction (Registers)
XCHG [R1], R2
Figure 2.14
XCHG Instruction (Memory Source Operand)
FADD R2, R4
Figure 2.15
Floating-Point Operation Instruction (Register-Register, Immediate-Register)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
IF
D
E
D
Load data
IF
D
E
M1
D
E
IF
D
E
WB
D
E
IF
D
E
WB
D
E
IF
D
IF
D
E
D
E
D
M1
Bypass process
stall
E
WB
Bit manipulation,
store operation
(mop1) load
(mop2) bit manipulation, store
M1
M1
(mop1) emul-1
WB
(mop2) emul-2
(mop1) xchg-1 Read from/Write to the register
WB
(mop2) xchg-2 Write to the register
E
M1
WB
D
E
M1
E
D
E
WB
(mop1) load
(mop2) add
Write to R4
Write to R5
(mop1) load
(mop2) store
(mop1) fadd-1
(mop2) fadd-2
(mop3) fadd-3
(mop4) fadd-4 Write to R4
Page 69 of 1041
2. CPU

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