Slave Address Register Ly (Sarly) (Y = 0 To 2) - Renesas RX100 Series User Manual

32-bit mcu
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RX13T Group
24.2.11

Slave Address Register Ly (SARLy) (y = 0 to 2)

Address(es): RIIC0.SARL0 0008 830Ah, RIIC0.SARL1 0008 830Ch, RIIC0.SARL2 0008 830Eh
b7
b6
Value after reset:
0
0
Bit
Symbol
Bit Name
b0
SVA0
10-Bit Address LSB
b7 to b1
SVA[6:0]
7-Bit Address/10-Bit Address Lower Bits
SVA0 Bit (10-Bit Address LSB)
When the 10-bit address format is selected (SARUy.FS bit is 1), this bit functions as the LSB of a 10-bit address and
forms the lower 8 bits of a 10-bit address in combination with the SVA[6:0] bits.
When the ICSER.SARyE bit is set to 1 (SARLy and SARUy enabled) and the SARUy.FS bit is 1, this bit is valid. While
the SARUy.FS bit or SARyE bit is 0, the setting of this bit is ignored.
SVA[6:0] Bits (7-Bit Address/10-Bit Address Lower Bits)
When the 7-bit address format is selected (SARUy.FS bit is 0), these bits function as a 7-bit address. When the 10-bit
address format is selected (SARUy.FS bit is 1), these bits function as the lower 8 bits of a 10-bit address in combination
with the SVA0 bit.
While the ICSER.SARyE bit is 0, the setting of these bits is ignored.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5
b4
b3
b2
SVA[6:0]
0
0
0
0
b1
b0
SVA0
0
0
Description
A slave address is set.
A slave address is set.
2
24. I
C-bus Interface (RIICa)
R/W
R/W
R/W
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