Renesas RX100 Series User Manual page 128

RX13T Group
Lower limit on VCC voltage (VCCmin)
LVD2IDTSEL[1:0] bits are set to 10b
(when drop and rise are detected)
LVD2IDTSEL[1:0] bits are set to 00b
(when rise is detected).
LVD2IDTSEL[1:0] bits are set to 01b
(when drop is detected).
Figure 8.6 Example of Voltage Monitoring 2 Interrupt Operation
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
VCC
Vdet2
LVD2DET bit
Voltage monitoring 2
interrupt request
LVD2DET bit
Voltage monitoring 2
interrupt request
LVD2DET bit
Voltage monitoring 2
interrupt request
8. Voltage Detection Circuit (LVDAb)
Set to 0 by a program
Set to 0 by a program
Set to 0 by a program
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