Renesas RX100 Series User Manual page 918

RX13T Group
When issuing the unique ID read command with this bit set to 1 after reading data from registers FRBH and FRBL, the
sequencer ends the read cycle and enters the wait state.
When issuing the unique ID read command again with this bit set to 0, the internal address of the sequencer is
incremented by 4, and the next data is read.
STOP Bit (Forced Processing Stop)
This bit is used to forcibly stop the processing (blank check or block erase) being executed.
After setting this bit to 1, wait until the FSTATR1.FRDY flag is 1 (processing completed) before setting the OPST bit to
0.
OPST Bit (Processing Start)
This bit is used to execute the command set in the CMD[2:0] bits.
This bit is not set to 0 again even when the processing is completed. Confirm that the FSTATR1.FRDY flag is 1
(processing completed) before setting the OPST bit to 0 again. After that, confirm that the FRDY flag is 0 before
executing the next processing.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
31. Flash Memory (FLASH)
Page 918 of 1041