Input Level Control/Status Register 3 (Icsr3) - Renesas RX100 Series User Manual

RX13T Group
20.2.2

Input Level Control/Status Register 3 (ICSR3)

Address(es): POE.ICSR3 0008 C4C8h
b15 b14
— —
Value after reset: 0 0
Bit Symbol
b1, b0 POE8M[1:0]
b7 to b2 —
b8 PIE3
b9 POE8E
b11, b10 —
b12 POE8F
b15 to b13 —
Note 1. Can be modified only once after a reset.
Note 2. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
The ICSR3 register selects the POE8# pin input mode, controls the enable/disable of interrupts, and indicates status.
POE8M[1:0] Bits (POE8 Mode Select)
These bits select the input mode of the POE8# pin.
PIE3 Bit (Port Interrupt Enable 3)
This bit enables or disables interrupt requests when the POE8F flag is set to 1.
POE8E Bit (POE8 High-Impedance Enable)
This bit specifies whether to put the output of the corresponding pin in the high-impedance state when the POE8F flag is
set to 1.
POE8F Flag (POE8 Flag)
This flag indicates that a high-impedance request has been input to the POE8# pin.
[Setting condition]
 When the input set by the POE8M[1:0] bits occurs at the POE8# pin
[Clearing condition]
 By writing 0 to the POE8F flag after reading POE8F = 1
When low-level sampling is set by the POE8M[1:0] bits, the high level needs to be input to the POE8# pin to write
0 to this flag.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b13 b12 b11 b10
— POE8F — —
0 0 0 0
Bit Name Description
POE8 Mode Select
b1 b0
0 0: Accepts a request on the falling edge of POE8# pin input.
0 1: Accepts a request when POE8# pin input has been sampled
1 0: Accepts a request when POE8# pin input has been sampled
1 1: Accepts a request when POE8# pin input has been sampled
Reserved These bits are read as 0. The write value should be 0.
Port Interrupt Enable 3 0: Interrupt requests disabled
1: Interrupt requests enabled
POE8 High-Impedance 0: Does not put the output in the high-impedance state by POE8#
Enable
1: Put the output in the high-impedance state by POE8# signal.
Reserved These bits are read as 0. The write value should be 0.
POE8 Flag 0: Indicates that a high-impedance request has not been input to the
1: Indicates that a high-impedance request has been input to the
Reserved These bits are read as 0. The write value should be 0.
b9 b8 b7 b6
POE8E PIE3 — —
0 0 0 0
16 times at PCLK/8 clock pulses and all are low level.
16 times at PCLK/16 clock pulses and all are low level.
16 times at PCLK/128 clock pulses and all are low level.
signal.
POE8# pin.
POE8# pin.
20. Port Output Enable 3 (POE3C)
b5 b4 b3 b2
— — — —
0 0 0 0
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b1 b0
POE8M[1:0]
0 0
R/W
R/W* 1
R/W
R/W
1
R/W*
R/W
R/(W)
2
*
R/W