Register Descriptions; Doc Control Register (Docr) - Renesas RX100 Series User Manual

RX13T Group
29.2

Register Descriptions

29.2.1

DOC Control Register (DOCR)

Address(es): 0008 B080h
b7 b6
DOPCF
—
CL
0 0
Value after reset:
Bit Symbol
b1, b0 OMS[1:0]
*1
b2 DCSEL
b3 —
b4 DOPCIE
b5 DOPCF
b6 DOPCFCL
b7 —
Note 1. Valid only when data comparison mode is selected.
OMS[1:0] Bits (Operating Mode Select)
These bits select the operating mode of the data operation circuit.
DCSEL Bit (Detection Condition Select)
This bit is valid only when data comparison mode is selected.
This bit selects the condition for detection in data comparison mode.
DOPCIE Bit (Data Operation Circuit Interrupt Enable)
Setting this bit to 1 enables interrupts from the data operation circuit.
DOPCF Flag (Data Operation Circuit Flag)
[Setting conditions]
 The condition selected by the DCSEL bit is met
 A result of data addition is greater than FFFFh
 A result of data subtraction is less than 0000h
[Clearing condition]
 Writing 1 to the DOPCFCL bit
DOPCFCL Bit (DOPCF Clear)
Setting this bit to 1 clears the DOPCF flag.
This bit is read as 0.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
DOPCF DOPCI
— DCSEL
E
0 0 0 0
Bit Name
Operating Mode Select
Detection Condition Select
Reserved
Data Operation Circuit
Interrupt Enable
Data Operation Circuit Flag
DOPCF Clear
Reserved
b1 b0
OMS[1:0]
0 0
Description
b1 b0
0 0: Data comparison mode
0 1: Data addition mode
1 0: Data subtraction mode
1 1: Setting prohibited
Result of data comparison
0: Data mismatch is detected.
1: Data match is detected.
This bit is read as 0. The write value should be 0.
0: Disables interrupts from the data operation circuit.
1: Enables interrupts from the data operation circuit.
Indicates the result of an operation.
0: Maintains the DOPCF flag state.
1: Clears the DOPCF flag.
This bit is read as 0. The write value should be 0.
29. Data Operation Circuit (DOC)
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