Timer Counter Synchronous Start Register (Tcsystr) - Renesas RX100 Series User Manual

RX13T Group
19.2.18

Timer Counter Synchronous Start Register (TCSYSTR)

Address(es): MTU.TCSYSTR 0009 5282h
b7 b6
SCH0 SCH1
Value after reset: 0 0
Bit Symbol Bit Name
b2 to b0 — Reserved
b3 SCH4 Synchronous Start 4
b4 SCH3 Synchronous Start 3
b5 SCH2 Synchronous Start 2
b6 SCH1 Synchronous Start 1
b7 SCH0 Synchronous Start 0
Note 1. Only 1 can be written to this bit. This bit is automatically cleared when the corresponding counter starts.
TCSYSTR specifies synchronous start of the counters.
SCH4 Bit (Synchronous Start 4)
This bit controls synchronous start of MTU4.TCNT.
[Clearing condition]
 When 1 is set to the TSTRA.CST4 bit while SCH4 = 1
SCH3 Bit (Synchronous Start 3)
This bit controls synchronous start of MTU3.TCNT.
[Clearing condition]
 When 1 is set to the TSTRA.CST3 bit while SCH3 = 1
SCH2 Bit (Synchronous Start 2)
This bit controls synchronous start of MTU2.TCNT.
[Clearing condition]
 When 1 is set to the TSTRA.CST2 bit while SCH2 = 1
SCH1 Bit (Synchronous Start 1)
This bit controls synchronous start of MTU1.TCNT.
[Clearing condition]
 When 1 is set to the TSTRA.CST1 bit while SCH1 = 1
SCH0 Bit (Synchronous Start 0)
This bit controls synchronous start of MTU0.TCNT.
[Clearing condition]
 When 1 is set to the TSTRA.CST0 bit while SCH0 = 1
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
SCH2 SCH3 SCH4 —
0 0 0 0
Description
These bits are read as 0. The write value should be 0.
0: Does not specify synchronous start for MTU4.TCNT
1: Specifies synchronous start for MTU4.TCNT
0: Does not specify synchronous start for MTU3.TCNT
1: Specifies synchronous start for MTU3.TCNT
0: Does not specify synchronous start for MTU2.TCNT
1: Specifies synchronous start for MTU2.TCNT
0: Does not specify synchronous start for MTU1.TCNT
1: Specifies synchronous start for MTU1.TCNT
0: Does not specify synchronous start for MTU0.TCNT
1: Specifies synchronous start for MTU0.TCNT
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
b1 b0
— —
0 0
R/W
R
1
R/(W)*
R/(W)* 1
1
R/(W)*
1
R/(W)*
1
R/(W)*
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