Exception Handling Procedure - Renesas RX100 Series User Manual

RX13T Group
13.2

Exception Handling Procedure

In the exception handling, part of the processing is handled automatically by hardware and part of it is handled by a
program (exception handling routine) that has been written by the user. Figure 13.2 shows the processing procedure
when an exception other than a reset is accepted.
Instruction Instruction
A
(For the fast interrupt)
PC BPC
PSW BPSW
U = 0
I = 0
PM = 0
(For exceptions other than the fast interrupt)
PC Saved on the stack (ISP)
PSW Saved on the stack (ISP)
U = 0
I = 0
PM = 0
Branch to the vector read handling routine
Exception handling routine
other than the non-maskable
interrupt
Non-maskable interrupt
UND : Undefined instruction exception
PIE : Privileged instruction exception
FPE : Floating-point exception
EI : Interrupt
TRAP : Unconditional trap
Figure 13.2 Outline of Exception Handling Procedure
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Generation of
exception event
Exception request
Instruction
B C The program is suspended and
the exception is accepted.
Hardware pre-processing
Switches to the supervisor mode.
General-purpose
registers saved Handling routine
on the stack
Non-maskable
interrupt handling
Restarting of program execution
Instruction Instruction
C
• Instruction canceling type
(UND, PIE, FPE)
• Instruction suspending type
(Reception of an EI during execution of
the RMPA instruction or a string
manipulation instruction)
• Instruction completion type
(EI and TRAP)
(For the fast interrupt)
BPC
BPSW
(For exceptions other than the fast interrupt)
Stack
Stack
User-written processing program
Restoration of
general-purpose
registers
Program completion or system reset
13. Exception Handling
D
Switches to the user mode
when the PM bit in PSW is 1.
PC
PSW
PC
PSW
Hardware post-processing
(For the fast interrupt)
RTFI instruction
(For exceptions other than the fast
interrupt)
RTE instruction
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