Pin Functions - Renesas RX100 Series User Manual

RX13T Group
1.4

Pin Functions

Table 1.4 lists the pin functions.
Table 1.4 Pin Functions (1/2)
Classifications Pin Name
Power supply VCC
VCL
VSS
Clock XTAL
EXTAL
Operating mode MD
control
System control RES#
CAC CACREF
On-chip FINED
emulator
Interrupts NMI
IRQ0 to IRQ5
Multi-function MTIOC0A, MTIOC0B,
timer pulse unit 3 MTIOC0C, MTIOC0D
MTIOC1A, MTIOC1B
MTIOC2A, MTIOC2B
MTIOC3A, MTIOC3B,
MTIOC3C, MTIOC3D
MTIOC4A, MTIOC4B,
MTIOC4C, MTIOC4D
MTIC5U, MTIC5V, MTIC5W
MTCLKA, MTCLKB,
MTCLKC, MTCLKD
ADSM0
Port output POE0#, POE8#, POE10#
enable 3
 Asynchronous mode/clock synchronous mode
Serial
communications
SCK1, SCK5
interface (SCIg)
RXD1, RXD5
TXD1, TXD5
CTS1#, CTS5#
RTS1#, RTS5#
 Simple I
SSCL1, SSCL5
SSDA1, SSDA5
 Simple SPI mode
SCK1, SCK5
SMISO1, SMISO5
SMOSI1, SMOSI5
SS1#, SS5#
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
I/O
Input
—
Input
Output
Input
Input
Input
Input
I/O
Input
Input
I/O
I/O
I/O
I/O
I/O
Input
Input
Output
Input
I/O
Input
Output
Input
Output
2
C mode
I/O
I/O
I/O
I/O
I/O
Input
Description
Power supply pin. Connect it to the system power supply.
Connect this pin to the VSS pin via the 4.7 μF smoothing capacitor used to
stabilize the internal power supply. Place the capacitor close to the pin.
Ground pin. Connect it to the system power supply (0 V).
Pins for connecting a crystal. An external clock can be input through the
EXTAL pin.
Pin for setting the operating mode. The signal levels on this pin must not
be changed during operation.
Reset pin. This MCU enters the reset state when this signal goes low.
Input pin for the clock frequency accuracy measurement circuit.
FINE interface pin.
Non-maskable interrupt request pin.
Interrupt request pins.
The TGRA0 to TGRD0 input capture input/output compare output/PWM
output pins.
The TGRA1 and TGRB1 input capture input/output compare output/PWM
output pins.
The TGRA2 and TGRB2 input capture input/output compare output/PWM
output pins.
The TGRA3 to TGRD3 input capture input/output compare output/PWM
output pins.
The TGRA4 to TGRD4 input capture input/output compare output/PWM
output pins.
The TGRU5, TGRV5, and TGRW5 input capture input/external pulse input
pins.
Input pins for the external clock.
A/D trigger output pin.
Input pins for request signals to place the MTU pins in the high impedance
state.
Input/output pins for the clock.
Input pins for received data.
Output pins for transmitted data.
Input pins for controlling the start of transmission and reception.
Output pins for controlling the start of transmission and reception.
2
Input/output pins for the I C clock.
2
Input/output pins for the I C data.
Input/output pins for the clock.
Input/output pins for slave transmit data.
Input/output pins for master transmit data.
Chip-select input pins.
1. Overview
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