Timer Mode Register 2 (Tmdr2A) - Renesas RX100 Series User Manual

32-bit mcu
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RX13T Group
BFE Bit (Buffer Operation E)
This bit specifies whether to operate MTU0.TGRE and MTU0.TGRF in the normal way or to use them together for
buffer operation. Compare match with TGRF occurs even when TGRF is used as a buffer register.
In MTU0 to MTU4, this bit is reserved. It is read as 0. The write value should be 0.
19.2.4

Timer Mode Register 2 (TMDR2A)

Address(es): MTU.TMDR2A 0009 5270h
b7
b6
Value after reset:
0
0
Bit
Symbol
Bit Name
b0
DRS
Double Buffer Select
b7 to b1
Reserved
TMDR2A specifies the double buffer function in complementary PWM mode 3 (transfer at the crest and trough of the
counter value). TMDR2A value should be specified only while TCNT operation is stopped.
DRS Bit (Double Buffer Select)
This bit enables or disables the double buffer function in complementary PWM mode.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5
b4
b3
b2
0
0
0
0
Description
0: Double buffer function is disabled
1: Double buffer function is enabled
These bits are read as 0. The write value should be 0.
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
b1
b0
DRS
0
0
R/W
R/W
R/W
Page 335 of 1041

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