Renesas RX100 Series User Manual page 764

RX13T Group
Master reception
Initial settings
No
ICCR2.BBSY = 0?
ICCR2.ST = 1
No
ICSR2.TDRE = 1?
Write data to ICDRT register
No
ICSR2.RDRF = 1?
ICSR2.NACKF = 0?
Perform dummy read of ICDRR
No
ICSR2.RDRF = 1?
Next data = Final byte - 1?
Next data = Final byte - 2?
Read ICDRR register
Set ICMR3.ACKBT bit
Read ICDRR register
No
ICSR2.RDRF = 1?
ICSR2.STOP = 0
ICCR2.SP = 1
Read ICDRR register
ICMR3.WAIT = 0
No
ICSR2.STOP = 1?
ICSR2.NACKF = 0
ICSR2.STOP = 0
End of master reception
Figure 24.11 Example of Master Reception (7-Bit Address Format, 3 Bytes or More)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Yes
Yes
Yes
No
Yes
register
Yes
Yes
No
Yes
No
ICMR3.WAIT = 1
Yes
ICSR2.STOP = 0
ICCR2.SP = 1
Perform dummy read of ICDRR
Yes
[1] Initial settings
[2] Check I
condition.
[3] Transmit the slave address followed by R and
check ACK.
[4] Perform dummy read.
[5] Read received data and prepare for receiving
final data.
[6] Set the acknowledgment and read data
of (final byte – 1 byte).
[7] Read final data and issue a stop
condition.
register
[8] Check stop condition issuance
[9] Processing for the next transfer operation
2
24. I C-bus Interface (RIICa)
2
C-bus occupation and issue a start
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