Usage Notes; Notes On Clock Generation Circuit; Notes On Resonator; Notes On Board Design - Renesas RX100 Series User Manual

RX13T Group
9.7

Usage Notes

9.7.1

Notes on Clock Generation Circuit

(1) The frequencies of the system clock (ICLK), peripheral module clocks (PCLKB, and PCLKD), and FlashIF clock
(FCLK) supplied to each module can be selected by the SCKCR register. Each frequency should meet the
following:
Select each frequency that is within the operation guaranteed range of clock cycle time (t
characteristics of electrical characteristics.
The frequencies must not exceed the ranges listed in Table 9.1 .
The peripheral modules operate on the PCLKB and PCLKD. Note therefore that the operating speed of modules
such as the timer and SCI varies before and after the frequency is changed.
(2) The relationship of frequencies of the system clock (ICLK), peripheral module clocks B and D (PCLKB, and
PCLKD), and FlashIF clock (FCLK) must be set as follows.
ICLK:FCLK = N:1 (N is an integer)
ICLK:PCLKB, and PCLKD = N:1 (N is an integer)
(3) To secure the processing after the clock frequency is changed, modify the pertinent clock control register to change
the frequency, and then read the value from the register, and then perform the subsequent processing.
9.7.2

Notes on Resonator

Since various resonator characteristics relate closely to the user's board design, adequate evaluation is required on the
user side before use, referencing the resonator connection example shown in this section. The circuit constants for the
resonator depend on the resonator to be used and the stray capacitance of the mounting circuit. Therefore, the circuit
constants should be determined in full consultation with the resonator manufacturer. The voltage to be applied between
the resonator pins must be within the absolute maximum rating.
9.7.3

Notes on Board Design

When using a crystal, place the resonator and its load capacitors as close to the XTAL and EXTAL pins as possible.
Other signal lines should be routed away from the oscillation circuit as shown in Figure 9.6 to prevent electromagnetic
induction from interfering with correct oscillation.
Figure 9.6 Notes on Board Design for Oscillation Circuit
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Prohibited Signal A Signal B
C
L2
C
L1
9. Clock Generation Circuit
) specified in AC
cyc
Prohibited
MCU
XTAL
EXTAL
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