Exit From Sleep Mode - Renesas RX100 Series User Manual

RX13T Group
11.6.1.2

Exit from Sleep Mode

Exit from sleep mode is initiated by any interrupt, a RES# pin reset, a power-on reset, a voltage monitoring reset, or a
reset caused by an IWDT underflow.
 Initiated by an interrupt
An interrupt initiates exit from sleep mode and the interrupt exception handling starts. If a maskable interrupt has
been masked by the CPU (the priority level *
2
PSW.IPL[3:0] bits *
 Initiated by a RES# pin reset
When the RES# pin is driven low, the MCU enters the reset state. When the RES# pin is driven high after the reset
signal is input for a predetermined time period, the CPU starts the reset exception handling.
 Initiated by a power-on reset
A power-on reset asserts a reset to the MCU.
When a power-on reset is negated by a rise in the supply voltage, the CPU starts the reset exception handling.
 Initiated by a voltage monitoring reset
A voltage monitoring reset asserts a reset to the MCU.
When a voltage monitoring reset is negated by a rise in the supply voltage, the CPU starts the reset exception
handling.
 Initiated by an independent watchdog timer reset
An internal reset generated by an IWDT underflow asserts a reset to the MCU. However, when IWDT counting is
stopped in sleep mode by setting OFS0.IWDTSTRT = 0 and OFS0.IWDTSLCSTP = 1, or OFS0.IWDTSTRT = 1
and IWDTCSTPR.SLCSTP = 1, the IWDT is stopped in sleep mode and sleep mode is not exited by the
independent watchdog timer reset.
Note 1. For details, refer to section 14, Interrupt Controller (ICUb).
Note 2. For details, refer to section 2, CPU.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
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of the interrupt has been set to a value lower than that of the
of the CPU), sleep mode is not exited.
11. Low Power Consumption
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