Operation In Asynchronous Mode; Serial Data Transfer Format - Renesas RX100 Series User Manual

32-bit mcu
Hide thumbs Also See for RX100 Series:
Table of Contents

Advertisement

RX13T Group
23.3

Operation in Asynchronous Mode

Figure 23.4 shows the general format for asynchronous serial communications.
One frame consists of a start bit (low level), transmit/receive data, a parity bit, and stop bits (high level).
In asynchronous serial communications, the communications line is usually held in the mark state (high level).
The SCI monitors the communications line. When the SCI detects a low, it regards that as a start bit and starts serial
communication.
Inside the SCI, the transmitter and receiver are independent units, enabling full-duplex communications. Both the
transmitter and the receiver also have a double-buffered structure, so that data can be read or written during transmission
or reception, enabling continuous data transmission and reception.
Serial data
Start bit
1 bit
Figure 23.4
Data Format in Asynchronous Serial Communications
(Example with 8-Bit Data, Parity, 2 Stop Bits)
23.3.1

Serial Data Transfer Format

Table 23.27 lists the serial data transfer formats that can be used in asynchronous mode.
Any of 18 transfer formats can be selected according to the SMR and SCMR setting. For details of multi-processor
function, refer to section 23.4, Multi-Processor Communications Function .
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
LSB
0
D0
D1
D2
Transmit/receive data
One unit of transfer data (character or frame)
23. Serial Communications Interface (SCIg, SCIh)
D3
D4
D5
D6
7 or 8 bits
MSB
D7
0/1
1
1
Parity bit
Stop bit
1 or 0 bit
1 or 2 bits
Page 636 of 1041
Idle state
(mark state)

Advertisement

Table of Contents
loading

Table of Contents