Table Of Contents - Renesas RX100 Series User Manual

Features ................................................................................................................................................... 31
1. Overview ........................................................................................................................................ 32
1.1 Outline of Specifications ..................................................................................................................... 32
1.2 List of Products .................................................................................................................................... 36
1.3 Block Diagram ..................................................................................................................................... 37
1.4 Pin Functions ....................................................................................................................................... 38
1.5 Pin Assignments .................................................................................................................................. 40
2. CPU ............................................................................................................................................... 44
2.1 Features ................................................................................................................................................ 44
2.2 Register Set of the CPU ....................................................................................................................... 45
2.2.1 General-Purpose Registers (R0 to R15) ..................................................................................... 46
2.2.2 Control Registers ........................................................................................................................ 46
2.2.2.1
2.2.2.2
2.2.2.3
2.2.2.4
2.2.2.5
2.2.2.6
2.2.2.7
2.2.2.8
2.2.3 Register Associated with DSP Instructions ................................................................................ 53
2.2.3.1
2.3 Processor Mode ................................................................................................................................... 54
2.3.1 Supervisor Mode ......................................................................................................................... 54
2.3.2 User Mode .................................................................................................................................. 54
2.3.3 Privileged Instruction ................................................................................................................. 54
2.3.4 Switching between Processor Modes ......................................................................................... 54
2.4 Data Types ........................................................................................................................................... 55
2.5 Endian .................................................................................................................................................. 55
2.5.1 Switching the Endian .................................................................................................................. 55
2.5.2 Access to I/O Registers ............................................................................................................... 59
2.5.3 Notes on Access to I/O Registers ............................................................................................... 59
2.5.4 Data Arrangement ....................................................................................................................... 59
2.5.4.1
2.5.4.2
2.5.5 Notes on the Allocation of Instruction Codes ............................................................................ 60
2.6 Vector Table ........................................................................................................................................ 61
2.6.1 Fixed Vector Table ..................................................................................................................... 61
2.6.2 Relocatable Vector Table ........................................................................................................... 62
2.7 Operation of Instructions ..................................................................................................................... 63
2.7.1 Data Prefetching by the RMPA Instruction and the String-Manipulation Instructions ............. 63
Interrupt Stack Pointer (ISP)/User Stack Pointer (USP) ................................................... 47
Interrupt Table Register (INTB) ........................................................................................ 47
Program Counter (PC) ....................................................................................................... 47
Processor Status Word (PSW) ........................................................................................... 48
Backup PC (BPC) .............................................................................................................. 49
Backup PSW (BPSW) ....................................................................................................... 50
Fast Interrupt Vector Register (FINTV) ............................................................................ 50
Floating-Point Status Word (FPSW) ................................................................................. 50
Accumulator (ACC) .......................................................................................................... 53
Data Arrangement in Registers ......................................................................................... 59
Data Arrangement in Memory ........................................................................................... 60
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