Open Drain Control Register 1 (Odr1) - Renesas RX100 Series User Manual

RX13T Group
17.3.6

Open Drain Control Register 1 (ODR1)

Address(es): PORT2.ODR1 0008 C085h, PORT3.ODR1 0008 C087h, PORT7.ODR1 0008 C08Fh, PORT9.ODR1 0008 C093h,
PORTB.ODR1 0008 C097h, PORTD.ODR1 0008 C09Bh
b7 b6
— B6
0 0
Value after reset:
Bit Symbol Bit Name
b0 B0 Pm4 Output Type Select
b1 — Reserved
b2 B2 Pm5 Output Type Select
b3 — Reserved
b4 B4 Pm6 Output Type Select
b5 — Reserved
b6 B6 Pm7 Output Type Select
b7 — Reserved
m = 2, 3, 7, 9, B, D
Bits corresponding to port m on the 48 pin-product but which do not exist on a product with fewer than 48 pins are
reserved. Write 0 to these bits.
The bits corresponding to a pin that does not exist or pins with no open-drain output allocation are reserved. A reserved
bit is read as 0. The write value should be 0.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
— B4 — B2
0 0 0 0
b1 b0
— B0
0 0
Description
0: CMOS output
1: N-channel open-drain
This bit is read as 0. The write value should be 0.
0: CMOS output
1: N-channel open-drain
This bit is read as 0. The write value should be 0.
0: CMOS output
1: N-channel open-drain
This bit is read as 0. The write value should be 0.
0: CMOS output
1: N-channel open-drain
This bit is read as 0. The write value should be 0.
17. I/O Ports
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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