Renesas RX100 Series User Manual page 276

RX13T Group
DTC vector address
DTCVBR + n × 4
DTC index address
DTCIBR + p × 4
Sequence transfer
request
Figure 16.16 Resumption and End of Sequence Transfer
Table 16.10 lists the settings of bits CHNE, SQEND, and INDX during the sequence transfer.
Table 16.10 Sequence Transfer Process and Values of Bits CHNE, SQEND, and INDX
DTC Operations
Start sequence transfer
Continue sequence transfer
Suspend sequence transfer*
End sequence transfer
End current sequence transfer and Obtain new sequence number
Some other transfer (not sequence transfer)
Note: Do not set the values other than listed above.
Note 1. Set MRA.MD[1:0] bits to 00b (normal transfer mode) when setting the INDX bit to 1.
Note 2. When a sequence transfer is suspended, the ICU.DTCERn.DTCE bit may become 0. Set the DTCE bit to 1 to resume sequence
transfer.
Even when a sequence transfer is suspended, a new sequence transfer cannot start until the suspended sequence transfer
is eventually completed. When a sequence transfer request is received during suspension of the sequence transfer, the
suspended sequence transfer is resumed.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
DTC vector table
Start address of
transfer information
DTC index table
Start address of sequence
(Resume sequence transfer)
2
16. Data Transfer Controller (DTCb)
Transfer information
Transfer information
INDX = 1
(Start sequence transfer)
Transfer information
Transfer information
CHNE = 1
SQEND = 0
Transfer information
CHNE = 0 (Suspend sequence transfer)
SQEND = 0
Transfer information
CHNE = 1
SQEND = 0
Transfer information
CHNE = 0
SQEND = 1
(End sequence transfer)
CHNE Bit
0
1
0
0
0
—
Data
Sequence number = p
SQEND Bit INDX Bit
1
0 1*
0 0
0 0
1 0
1
1 1*
0 0
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