Backup Psw (Bpsw); Fast Interrupt Vector Register (Fintv); Floating-Point Status Word (Fpsw) - Renesas RX100 Series User Manual

RX13T Group
2.2.2.6

Backup PSW (BPSW)

b31
Value after reset: Undefined
The backup PSW (BPSW) is provided to speed up response to interrupts.
After a fast interrupt has been generated, the contents of the processor status word (PSW) are saved in the BPSW. The
allocation of bits in the BPSW corresponds to that in the PSW.
2.2.2.7

Fast Interrupt Vector Register (FINTV)

b31
Undefined
Value after reset:
The fast interrupt vector register (FINTV) is provided to speed up response to interrupts.
The FINTV register specifies a branch destination address when a fast interrupt has been generated.
2.2.2.8

Floating-Point Status Word (FPSW)

b31 b30
FS FX
0 0
Value after reset:
b15 b14
— EX
0 0
Value after reset:
Bit Symbol Bit Name
b1, b0 RM[1:0] Floating-Point Rounding-Mode
Setting
b2 CV Invalid Operation Cause Flag
b3 CO Overflow Cause Flag
b4 CZ Division-by-Zero Cause Flag
b5 CU Underflow Cause Flag
b6 CX Inexact Cause Flag
b7 CE Unimplemented Processing Cause
Flag
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b29 b28 b27 b26
FU FZ FO FV
0 0 0 0
b13 b12 b11 b10
EU EZ EO EV
0 0 0 0
b25 b24 b23 b22
— — — —
0 0 0 0
b9 b8 b7 b6
— DN CE CX
0 1 0 0
Description
b1 b0
0 0: Rounding towards the nearest value
0 1: Rounding towards 0
1 0: Rounding towards +∞
1 1: Rounding towards –∞
0: No invalid operation has been encountered.
1: Invalid operation has been encountered.
0: No overflow has occurred.
1: Overflow has occurred.
0: No division-by-zero has occurred.
1: Division-by-zero has occurred.
0: No underflow has occurred.
1: Underflow has occurred.
0: No inexact exception has been generated.
1: Inexact exception has been generated.
0: No unimplemented processing has been encountered.
1: Unimplemented process has been encountered.
b21 b20 b19 b18
— — — —
0 0 0 0
b5 b4 b3 b2
CU CZ CO CV
0 0 0 0
Page 50 of 1041
2. CPU
b0
b0
b17 b16
— —
0 0
b1 b0
RM[1:0]
0 0
R/W
R/W
R/(W)
1
*
R/(W)
1
*
R/(W)
1
*
R/(W)
* 1
R/(W)
1
*
R/(W)
1
*