Voltage Detection Circuit (Lvdab); Overview - Renesas RX100 Series User Manual

RX13T Group
8.

Voltage Detection Circuit (LVDAb)

The voltage detection circuit (LVD) monitors the voltage level input to the VCC pin using a program.
8.1

Overview

In voltage detection 0, the detection voltage can be selected from three levels using option function select register 1
(OFS1).
In voltage detection 1, the detection voltage can be selected from nine levels using the voltage detection level select
register (LVDLVLR).
In voltage detection 2, the detection voltage can be selected from four levels using the LVDLVLR register.
Voltage monitoring 0 reset, voltage monitoring 1 reset/interrupt, and voltage monitoring 2 reset/interrupt can be used.
Table 8.1 lists the specifications of the voltage detection circuit. Figure 8.1 is a block diagram of the voltage detection
circuit. Figure 8.2 is a block diagram of the voltage monitoring 1 interrupt/reset circuit. Figure 8.3 is a block diagram of
the voltage monitoring 2 interrupt/reset circuit.
Table 8.1 LVD Specifications
Item
VCC monitoring Monitored
voltage
Detection
target
Detection
voltage
Monitoring
flag
Process upon Reset
voltage detection
Interrupt
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Voltage Monitoring 0
Vdet0
Voltage drops past Vdet0
Voltage selectable from 3 levels
using OFS1
Not available
Voltage monitoring 0 reset
Reset when Vdet0 > VCC
CPU restart after specified
time with VCC > Vdet0
Not available
8. Voltage Detection Circuit (LVDAb)
Voltage Monitoring 1
Vdet1
When voltage rises above or
drops below Vdet1
Voltage selectable from 9 levels
using the
LVDLVLR.LVD1LVL[3:0] bits
LVD1SR.LVD1MON flag:
Monitors whether voltage is
higher or lower than Vdet1
LVD1SR.LVD1DET flag: Vdet1
passage detection
Voltage monitoring 1 reset
Reset when Vdet1 > VCC
CPU restart timing selectable:
after specified time with VCC >
Vdet1 or Vdet1 > VCC
Voltage monitoring 1 interrupt
Non-maskable or maskable
interrupt is selectable
Interrupt request issued when
Vdet1 > VCC and VCC > Vdet1
or either
Voltage Monitoring 2
Vdet2
When voltage rises above or
drops below Vdet2
Voltage selectable from 4 levels
using the
LVDLVLR.LVD2LVL[1:0] bits
LVD2SR.LVD2MON flag:
Monitors whether voltage is
higher or lower than Vdet2
LVD2SR.LVD2DET flag: Vdet2
passage detection
Voltage monitoring 2 reset
Reset when Vdet2 > VCC
CPU restart timing selectable:
after specified time with VCC >
Vdet2 or after specified time with
Vdet2 > VCC
Voltage monitoring 2 interrupt
Non-maskable or maskable
interrupt is selectable
Interrupt request issued when
Vdet2 > VCC and VCC > Vdet2
or either
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