Renesas RX100 Series User Manual page 8

2.8 Pipeline ................................................................................................................................................ 63
2.8.1 Overview .................................................................................................................................... 63
2.8.2 Instructions and Pipeline Processing .......................................................................................... 65
2.8.2.1
2.8.2.2
2.8.2.3
2.8.3 Calculation of the Instruction Processing Time ......................................................................... 72
2.8.4 Numbers of Cycles for Response to Interrupts ........................................................................... 73
3. Operating Modes ........................................................................................................................... 74
3.1 Operating Mode Types and Selection ................................................................................................. 74
3.2 Register Descriptions ........................................................................................................................... 75
3.2.1 Mode Monitor Register (MDMONR) ........................................................................................ 75
3.2.2 System Control Register 1 (SYSCR1) ........................................................................................ 76
3.3 Details of Operating Modes ................................................................................................................. 77
3.3.1 Single-Chip Mode ....................................................................................................................... 77
3.3.2 Boot Mode .................................................................................................................................. 77
3.3.2.1
3.4 Transitions of Operating Modes .......................................................................................................... 78
3.4.1 Operating Mode Transitions Determined by the Mode-Setting Pins ......................................... 78
4. Address Space ............................................................................................................................... 79
4.1 Address Space ...................................................................................................................................... 79
5. I/O Registers .................................................................................................................................. 81
5.1 I/O Register Addresses (Address Order) ............................................................................................. 83
6. Resets ............................................................................................................................................ 94
6.1 Overview ............................................................................................................................................. 94
6.2 Register Descriptions ........................................................................................................................... 96
6.2.1 Reset Status Register 0 (RSTSR0) ............................................................................................. 96
6.2.2 Reset Status Register 1 (RSTSR1) ............................................................................................. 97
6.2.3 Reset Status Register 2 (RSTSR2) ............................................................................................. 98
6.2.4 Software Reset Register (SWRR) ............................................................................................... 99
6.3 Operation ........................................................................................................................................... 100
6.3.1 RES# Pin Reset ......................................................................................................................... 100
6.3.2 Power-On Reset and Voltage Monitoring 0 Reset ................................................................... 100
6.3.3 Voltage Monitoring 1 Reset and Voltage Monitoring 2 Reset ................................................. 102
6.3.4 Independent Watchdog Timer Reset ........................................................................................ 103
6.3.5 Software Reset .......................................................................................................................... 103
6.3.6 Determination of Cold/Warm Start .......................................................................................... 104
6.3.7 Determination of Reset Generation Source .............................................................................. 105
7. Option-Setting Memory (OFSM) .................................................................................................. 106
7.1 Overview ........................................................................................................................................... 106
7.2 Register Descriptions ......................................................................................................................... 107
Instructions Converted into Single Micro-Operation and Pipeline Processing ................. 65
Instructions Converted into Multiple Micro-Operations and Pipeline Processing ............ 67
Pipeline Basic Operation ................................................................................................... 70
Boot Mode (SCI) ............................................................................................................... 77