Note On Transmit Enable Bit (Te Bit); Note On Stopping Reception When Using The Rts Function In Asynchronous Mode - Renesas RX100 Series User Manual

RX13T Group
23.13.14

Note on Transmit Enable Bit (TE Bit)

When setting the pin function to "TXDn" while the SCR.TE bit is 0 (serial transmission is disabled) or setting the TE bit
to 0 while the pin function is "TXDn", output of the TXDn pin becomes high-impedance.
Prevent the TXDn line from becoming high-impedance by any of the following ways:
(1) Connect a pull-up resistor to the TXDn line.
1
(2) Set the TE bit to 1 *
port, output" before setting the TE bit to 0.
Note 1. An interrupt is generated when the TE bit is set to 1 while the TXI interrupt is enabled. If this creates a problem,
change the pin function to "TXDn" first, and then set the corresponding ICU.IERm.IENj bit to 1.
23.13.15 Note on Stopping Reception When Using the RTS Function in Asynchronous
Mode
One clock cycle of PCLK is required for the time from setting the SCR.RE bit to 0 to stopping the RTS signal generator
in asynchronous mode.
When reading the RDR (or RDRL) register after setting the SCR.RE bit to 0, confirm that the RE bit has been set to 0
before reading the RDR (or RDRL) register to prevent these two processes from being performed consecutively.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
before changing the pin function to "TXDn". Change the pin function to "general-purpose I/O
23. Serial Communications Interface (SCIg, SCIh)
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