Renesas RX100 Series User Manual page 672

RX13T Group
Figure 23.38 shows an example of data transmission when the SCI is set to smart card interface mode according to the
flow described in Figure 23.37 after a reset. When the pin functions are set to the SCK and TXD pins, they are still
high-impedance because the SCR.CKE[0] and SCR.TE bits are 0. When the CKE[0] bit is set to 1, clock is output from
the SCK pin. When the transmit data is written after setting the TE bit to 1, a data transmission starts. After the TE bit is
set to 1, one frame of high-impedance is output from TXD pin (internal wait time) and then the data transmission starts.
In smart card interface mode, the clock is continuously output while the CKE[0] bit is set to 1 (clock output) even if both
the TE and RE bits are set to 0.
Mode
SCR.CKE[0] bit
Hi-Z
SCK pin
SCR.TE bit
Hi-Z
TXD pin
Figure 23.38 Example of Data Transmission Timing in Smart Card Interface Mode
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Wait time
Pin function is set Transmit data is written
23. Serial Communications Interface (SCIg, SCIh)
Smart card interface mode
Data transmission
Ds D0 D1
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