Renesas RX100 Series User Manual page 396

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Table of Contents

(1) Example of Buffer Operation Setting Procedure

Figure 19.16 shows an example of the buffer operation setting procedure.

Buffer operation

Select TGR function

Set buffer operation

Figure 19.16

Example of Buffer Operation Setting Procedure

(2) Examples of Buffer Operation

(a) When TGR is an Output Compare Register

Figure 19.17 shows an operation example in which PWM mode 1 has been designated for MTU0, and buffer operation

has been designated for TGRA and TGRC. The settings used in this example are TCNT clearing by compare match B,

high output at compare match A, and low output at compare match B. In this example, the TTSA bit in TBTM is set to 0.

As buffer operation has been set, when compare match A occurs, the output changes and the value in buffer register

TGRC is simultaneously transferred to timer general register TGRA. This operation is repeated each time compare

match A occurs.

For details of PWM modes, refer to section 19.3.5, PWM Modes .

Figure 19.17

Example of Buffer Operation (1)

R01UH0822EJ0100 Rev.1.00

Jul 31, 2019

19. Multi-Function Timer Pulse Unit 3 (MTU3c)

[1] Designate TGR as an input capture register or

output compare register by means of TIOR.

[2] Designate TGR for buffer operation with bits BFA

and BFB in TMDR1.

[3] Set the CSTn bit in TSTRA to 1 to start the count

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