Counter Value When Count Operation Is Stopped In Complementary Pwm Mode; Buffer Operation Setting In Complementary Pwm Mode - Renesas RX100 Series User Manual

RX13T Group
19.6.13 Counter Value When Count Operation is Stopped in Complementary PWM
Mode
When counting operation in MTU3.TCNT and MTU4.TCNT is stopped in complementary PWM mode, the
MTU3.TCNT value is set to the timer dead time register (TDDRA) value and MTU4.TCNT is set to 0000h.
When operation is restarted in complementary PWM mode, counting begins automatically from the initial setting state.
Figure 19.133 shows this operation.
When counting begins in another operating mode, be sure to make initial settings in MTU3.TCNT and MTU4.TCNT.
MTU3.TGRA
Figure 19.133 Counter Value When Stopped in Complementary PWM Mode
19.6.14

Buffer Operation Setting in Complementary PWM Mode

When modifying the PWM period set register (MTU3.TGRA), timer period data register (TCDRA), and duty set
registers (MTU3.TGRB, MTU4.TGRA, and MTU4.TGRB) in complementary PWM mode, be sure to use buffer
operation. In addition, set the BFA and BFB bits in MTU4.TMDR1 to 0. The MTIOC4C pin cannot output waveforms if
the BFA bit in MTU4.TMDR1 is set to 1. Likewise, the MTIOC4D pin cannot output waveforms if the BFB bit in
MTU4.TMDR1 is set to 1.
In complementary PWM mode, buffer operation in MTU3 and MTU4 depends on the settings in bits BFA and BFB of
MTU3.TMDR1. When the BFA bit in MTU3.TMDR1 is set to 1, MTU3.TGRC functions as a buffer register for
MTU3.TGRA. At the same time, MTU4.TGRC functions as a buffer register for MTU4.TGRA, and TCBRA functions
as a buffer register for TCDRA.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
TCDRA
MTU3.TCNT
MTU4.TCNT
TDDRA
0000h
Complementary PWM mode
operation
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
Complementary PWM
mode operation
Counter Complementary
operation stop PWM restart
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