Renesas RX100 Series User Manual page 699

RX13T Group
RXDX12 pin
CR0.RXDSF
STR.BFDF
STR.CF0MF
STR.CF1MF
(1)
The above diagram assumes the following:
ESMER: ESME = 1
CR1: BFE = 1, CF0RE = 1, CF1DS[1:0] = 10b
PCR: RXDXPS = 0
ICR: BFDIE = 1, CF0MIE = 1, CF1MIE = 1
TMR: TOMS[1:0] = 01b
Figure 23.63 Example of Operations at the Time of Start Frame Reception
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Break Field low width
Write 1 to
Set to 0 after Break Field
CR3.SDST
low width detection
Specified period for
TCNT and TPRE
(2) (3)
23. Serial Communications Interface (SCIg, SCIh)
Start Frame
Control Field 0
8 bits
Write 1 to
STCR.BFDCL
(4)
Information Frame
Control Field 1
8 bits
Write 1 to
STCR.CF0MCL
Write 1 to
STCR.CF1MCL
(5)
Page 699 of 1041
Data Field