Comparator Output Monitor Register (Cmpmon); Comparator External Output Enable Register (Cmpioc) - Renesas RX100 Series User Manual

RX13T Group
28.2.4

Comparator Output Monitor Register (CMPMON)

Address(es): CMPC0.CMPMON 000A 0C8Ch, CMPC1.CMPMON 000A 0CACh, CMPC2.CMPMON 000A 0CCCh
b7 b6
— —
0 0
Value after reset:
Bit Symbol
b0 CMPMON0
b7 to b1 —
Note 1. When comparator operation is enabled (CMPCTL.HCMPON and COE bits are 1) while the noise filter is disabled
(CMPCTL.CDFS[1:0] bits are 00b), read the CMPMON0 bit twice and use the value only when the results match.
28.2.5

Comparator External Output Enable Register (CMPIOC)

Address(es): CMPC0.CMPIOC 000A 0C90h, CMPC1.CMPIOC 000A 0CB0h, CMPC2.CMPIOC 000A 0CD0h
b7 b6
— —
0 0
Value after reset:
Bit Symbol
b0 CPOE
b7 to b1 —
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
— — — —
0 0 0 0
Bit Name
Comparator Output Monitor Flag
1
*
Reserved
b5 b4 b3 b2
— — — —
0 0 0 0
Bit Name
External Pin Output Enable
Reserved
b1 b0
CMPM
—
ON0
0 0
Description
0: Comparator output is 0.
1: Comparator output is 1.
These bits are read as 0. The write value should be 0.
b1 b0
— CPOE
0 0
Description
Comparison result by the comparator is output to an external pin.
0: Output to the comparator external pin is disabled (the output
signal is fixed to low)
1: Output to the comparator external pin is enabled
These bits are read as 0. The write value should be 0.
28. Comparator C (CMPC)
R/W
R
R/W
R/W
R/W
R/W
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