Renesas RX100 Series User Manual page 502

RX13T Group
Pin initialization procedures are described below for the numbered combinations in Table 19.64 . The active level is
assumed to be low.
(1) Operation When Error Occurs in Normal Mode and Operation is Restarted in Normal Mode
Figure 19.143 shows a case in which an error occurs in normal mode and operation is restarted in normal mode after re-
setting.
MTU module output
MTIOCnA
MTIOCnB
PORT output
Pxx
Pxx
Figure 19.143 Error Occurrence in Normal Mode, Recovery in Normal Mode
(1) After a reset, the MTU output goes low and the ports enter high-impedance state.
(2) After a reset, the TMDR1 setting is for normal mode.
(3) For MTU3 and MTU4, enable output with the TOERA register before initializing the pins with the TIOR register.
(4) Initialize the pins with the TIOR register. (In the example, the initial output is a high level, and a low level is output
on compare match occurrence.)
(5) Set MTU output using the MPC and port mode registers (PMR) corresponding to the I/O ports.
(6) Start count operation by setting the TSTRA register.
(7) Output goes low on compare match occurrence.
(8) An error occurs.
(9) Allow non-active level output by setting the pins as general output ports using the port direction registers (PDR),
port output data registers (PODR), and port mode registers (PMR) of the I/O ports.
(10) Stop count operation by setting the TSTRA register.
(11) This step is not necessary when restarting in normal mode.
(12) Initialize the pins with the TIOR register.
(13) Set MTU output using the MPC and port mode registers (PMR) corresponding to the I/O ports.
(14) Restart operation by setting the TSTRA register.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
(1) (2) (3) (4) (5)
Reset TMDR TOER TIOR MPC
(normal) (1) (1 init (MTU)
0 out)
Hi-Z
Hi-Z
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
(6) (7) (8) (9) (10)
TSTR Match Error Port TSTR
(1) occurs output (0) (normal)
(11) (12) (14)
(13)
TMDR TIOR TSTR
MPC
(1 init (MTU) (1)
0 out)
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