Renesas RX100 Series User Manual page 248

RX13T Group
(1) Normal transfer and repeat transfer modes
1-byte, 1-word, or 1-longword of data is transferred on a single transfer request. The transfer address and transfer
count are not updated so that the same transfer is repeated on each transfer request. When the transfer count is 1, the
ICU.DTCERn.DTCE bit is not set to 0, and data transfer continues in response to the next transfer request.
(2) Block transfer mode
1-block of data is transferred on a single transfer request. The transfer address and transfer count are not updated so
that the same block transfer is repeated on each transfer request. When the block transfer count is 1, the
ICU.DTCERn.DTCE bit is not set to 0, and data transfer continues in response to the next transfer request.
When setting the DISPE bit to 1, set the MRA.WBDIS bit to 1 (does not write back the transfer information). If the value
of the WBDIS bit in any transfer information is 1, set the DTCCR.RRS bit to 0 (so that reading of the transfer
information is not skipped).
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
16. Data Transfer Controller (DTCb)
Page 248 of 1041