Serial Status Register (Ssr) - Renesas RX100 Series User Manual

RX13T Group
23.2.9

Serial Status Register (SSR)

Some bits in the SSR register have different functions in smart card interface mode and non-smart card interface mode.
(1) Non-Smart Card Interface Mode (SCMR.SMIF = 0)
Address(es): SCI1.SSR 0008 A024h, SCI5.SSR 0008 A0A4h, SCI12.SSR 0008 B304h
b7 b6
TDRE RDRF ORER
1 0
Value after reset:
Bit Symbol Bit Name
b0 MPBT Multi-Processor Bit Transfer
b1 MPB Multi-Processor
b2 TEND Transmit End Flag
b3 PER Parity Error Flag
b4 FER Framing Error Flag
b5 ORER Overrun Error Flag
b6 RDRF Receive Data Full Flag
b7 TDRE Transmit Data Empty Flag
Note 1. Only 0 can be written to this bit, to clear the flag. To clear this flag, confirm that the flag is 1 and then set it to 0.
Note 2. Write 1 when writing is necessary.
MPB Bit (Multi-Processor)
Holds the value of the multi-processor bit in the reception frame. This bit does not change when the SCR.RE bit is 0.
TEND Flag (Transmit End Flag)
Indicates completion of transmission.
[Setting conditions]
 When the SCR.TE bit is set to 0 (serial transmission is disabled)
When the SCR.TE bit is changed from 0 to 1, the TEND flag is not affected and retains the value 1.
 When the TDR register is not updated at the time of transmission of the tail-end bit of a character being transmitted
[Clearing condition]
 When transmit data are written to the TDR register while the SCR.TE bit is 1
When setting the TEND flag to 0 to complete the interrupt handling, refer to section 14.4.1.2, Operation of
Status Flags for Level-Detected Interrupts .
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
FER PER TEND
0 0 0 1
23. Serial Communications Interface (SCIg, SCIh)
b1 b0
MPB MPBT
0 0
Description
Sets the multi-processor bit for adding to the transmission frame
0: Data transmission cycles
1: ID transmission cycles
Value of the multi-processor bit in the reception frame
0: Data transmission cycles
1: ID transmission cycles
0: A character is being transmitted.
1: Character transfer has been completed.
0: No parity error occurred
1: A parity error has occurred
0: No framing error occurred
1: A framing error has occurred
0: No overrun error occurred
1: An overrun error has occurred
0: No valid data is held in the RDR register
1: Received data is held in the RDR register
0: Data to be transmitted is held in the TDR register
1: No data is held in the TDR register
R/W
R/W
R
R
R/(W)
1
*
R/(W)
1
*
R/(W)
1
*
R/(W)
2
*
R/(W)
2
*
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