Analog Input Sampling Time And Scan Conversion Time - Renesas RX100 Series User Manual

RX13T Group
26.3.5

Analog Input Sampling Time and Scan Conversion Time

Figure 26.26 shows the scan conversion timing in single scan mode, in which scan conversion is activated by software
or a synchronous trigger. Figure 26.27 shows the scan conversion timing in single scan mode, in which scan conversion
is activated by an asynchronous trigger. The scan conversion time (t
channel-dedicated sample-and-hold circuit processing time (t
2
time (t ) * , self-diagnosis A/D conversion processing time (t
DIS
channel-dedicated sample-and-hold circuit end time (t
The A/D conversion processing time (t
approximation (t ). The sampling time (t
SAM
is not sufficient sampling time due to the high impedance of an analog input signal source, or if the A/D conversion clock
(ADCLK) is slow, sampling time can be adjusted using the ADSSTR register.
The time for conversion by successive approximation (t
conversion time.
The scan conversion time (t
as follows:
t = t + t + (t
SCAN D SPLSH
The scan conversion time for the first cycle in continuous scan mode is t
The scan conversion time for the second and subsequent cycles in continuous scan mode is fixed to t
t + t + (t × n) *
DIAG DSD CONV
Note 1. When no channel-dedicated sample-and-hold circuits are used, t
Note 2. When disconnection detection assistance is not selected, t
states is inserted only when internal reference voltage is A/D-converted.
Note 3. When the self-diagnosis function is not used, t
Note 4. When no channel-dedicated sample-and-hold circuits are used, t
assumed. In single scan mode and group scan mode, t
Note 5. t × n when the sampling time (t
CONV
of each channel and time for conversion by successive approximation (t
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
) consists of sampling time (t
CONV
) is used to charge sample-and-hold circuits in the A/D converter. If there
SPL
) in single scan mode for which the number of selected channels is n can be determined
SCAN
× n) + t + (t
DIS DIAG CONV
5
+ t .
SHED
) of selected channels is the same, but it is the total of the sampling time
SPL
) includes the start-of-scanning-delay time (t
SCAN
1
) * , disconnection detection assistance processing
SPLSH
3
) * , A/D conversion processing time (t
DIAG
4
) *
, and end-of-scanning-delay time (t
SHED
) and time for conversion by successive
SPL
) is at 32 ADCLK states. Table 26.13 shows the scan
SAM
5
× n) *
+ t
ED
for single scan minus t
SCAN
SPLSH
= 0. The auto-discharge period of 15 ADCLK
DIS
= 0, t = 0.
DIAG DSD
= 0. Here, continuous scan mode is
SHED
is included in the end-of-scanning-delay time (t
SHED
26. 12-Bit A/D Converter (S12ADF)
).
ED
plus t
ED
SPLSH
= 0.
).
SAM
Page 872 of 1041
),
D
),
CONV
.
SHED
+ (t × n) +
DIS
).
ED