Renesas RX100 Series User Manual page 661

32-bit mcu
Hide thumbs Also See for RX100 Series:
Table of Contents

Advertisement

RX13T Group
Synchronization
clock
Serial data
TXI interrupt flag
1
(IRn in ICU*
)
SSR.TEND flag
TXI interrupt
request
generated
Note 1. Refer to section 14, Interrupt Controller (ICUb) for details on the corresponding interrupt vector number.
Figure 23.26
Example of Serial Data Transmission in Clock Synchronous Mode from the Middle of
Transmission until Transmission Completion
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Bit 0
Bit 1
Bit 7
Data written to TDR in
TXI interrupt handling
routine
1 frame
23. Serial Communications Interface (SCIg, SCIh)
Bit 0
Bit 1
Bit 7
(TIE = 1)
TXI interrupt
Data written to TDR in TXI
request
interrupt handling routine
generated
(Set the TIE bit to 0 and the
TEIE bit to 1 after writing the
last data)
Bit 0
Bit 1
Bit 7
(TIE = 0)
TEI interrupt
request
generated
Page 661 of 1041

Advertisement

Table of Contents
loading

Table of Contents