Renesas RX100 Series User Manual page 445

32-bit mcu
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RX13T Group
 Examples of Output Waveform Control at Synchronous Counter Clearing in Complementary PWM Mode
Figure 19.65 to Figure 19.68 show examples of output waveform control in which MTU3 and MTU4 operate in
complementary PWM mode and synchronous counter clearing is generated while the WRE bit in TWCRA is set to 1. In
the examples shown in Figure 19.65 to Figure 19.68 , synchronous counter clearing occurs at timing (3), (6), (8), and
(11) shown in Figure 19.63 , respectively.
MTU3.TGRA
TCDRA
MTU3.TGRB
TDDRA
0000h
Positive- phase
output
Negative-phase
output
Figure 19.65
Example of Synchronous Clearing in Dead Time during Up-Counting
(Timing (3) in Figure 19.63; TWCRA.WRE Bit is 1)
MTU3.TGRA
TCDRA
MTU3.TGRB
TDDRA
0000h
Positive- phase
output
Negative-phase
output
Figure 19.66
Example of Synchronous Clearing in Tb1 interval
(Timing (6) in Figure 19.63; TWCRA.WRE Bit is 1)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Synchronous
clearing
MTU3.TCNT
MTU4.TCNT
(Output waveform is active-low)
Synchronous
clearing
MTU3.TCNT
(Output waveform is active-low)
19. Multi-Function Timer Pulse Unit 3 (MTU3c)
WRE bit = 1
WRE bit = 1
MTU4.TCNT
MTU3.TCNT
MTU4.TCNT
TCNTSA
MTU3.TCNT
MTU4.TCNT
TCNTSA
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