Renesas RX100 Series User Manual page 827

RX13T Group
for details.
Table 26.7 lists the selection of A/D conversion start sources selected by the TRSA[5:0] bits.
Table 26.6 Selection of A/D Activation Sources by the TRSB[5:0] Bits
Module Source
Trigger source deselection state
MTU TRGA0N
TRGA1N
TRGA2N
TRGA3N
TRGA4N
TRG0N
TRG4AN
TRG4BN
TRG4AN or
TRG4BN
TRG4ABN
Table 26.7 Selection of A/D Activation Sources by the TRSA[5:0] Bits
Module Source
Trigger source deselection state
External pin ADTRG0#
MTU TRGA0N
TRGA1N
TRGA2N
TRGA3N
TRGA4N
TRG0N
TRG4AN
TRG4BN
TRG4AN or
TRG4BN
TRG4ABN
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Remarks
Compare match/input capture from MTU0.TGRA
Compare match/input capture from MTU1.TGRA
Compare match/input capture from MTU2.TGRA
Compare match/input capture from MTU3.TGRA
Compare match/input capture from MTU4.TGRA or underflow
(trough) of MTU4.TCNT in complementary PWM mode
Compare match from MTU0.TGRE
Compare match between MTU4.TADCORA and MTU4.TCNT
Compare match between MTU4.TADCORB and MTU4.TCNT
Compare match between MTU4.TADCORA and MTU4.TCNT, or
compare match between MTU4.TADCORB and MTU4.TCNT
Compare match between MTU4.TADCORA and MTU4.TCNT,
and compare match between MTU4.TADCORB and
MTU4.TCNT (when interrupt skipping function 2 is used)
Remarks
Trigger input pin
Compare match/input capture from MTU0.TGRA
Compare match/input capture from MTU1.TGRA
Compare match/input capture from MTU2.TGRA
Compare match/input capture from MTU3.TGRA
Compare match/input capture from MTU4.TGRA or underflow
(trough) of MTU4.TCNT in complementary PWM mode
Compare match from MTU0.TGRE
Compare match between MTU4.TADCORA and MTU4.TCNT
Compare match between MTU4.TADCORB and MTU4.TCNT
Compare match between MTU4.TADCORA and MTU4.TCNT, or
compare match between MTU4.TADCORB and MTU4.TCNT
Compare match between MTU4.TADCORA and MTU4.TCNT,
and compare match between MTU4.TADCORB and
MTU4.TCNT (when interrupt skipping function 2 is used)
26. 12-Bit A/D Converter (S12ADF)
TRSB[5] TRSB[4] TRSB[3] TRSB[2] TRSB[1] TRSB[0]
1 1 1 1
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 1
0 0 0 1
0 0 1 0
0 0 1 0
0 0 1 0
0 0 1 0
0 0 1 1
TRSA[5] TRSA[4] TRSA[3] TRSA[2] TRSA[1] TRSA[0]
1 1 1 1
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 1
0 0 0 1
0 0 1 0
0 0 1 0
0 0 1 0
0 0 1 0
0 0 1 1
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1 1
0 1
1 0
1 1
0 0
0 1
0 0
0 1
1 0
1 1
0 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
0 0
0 1
1 0
1 1
0 0