Renesas RX100 Series User Manual page 675

RX13T Group
When transmitting/receiving data using the DTC, be sure to make settings to enable the DTC before making SCI settings.
For DTC settings, refer to section 16, Data Transfer Controller (DTCb) .
Note that the SSR.TEND flag is set in different timings depending on the GM bit setting in the SMR register. Figure
23.41 shows the TEND flag generation timing.
I/O data
SSR.TEND flag
(TXI interrupt)
When GM bit in SMR = 0
When GM bit in SMR = 1
Ds: Start bit
D0 to D7: Data bits
Dp: Parity bit
DE: Error signal
Figure 23.41 SSR.TEND Flag Generation Timing during Transmission
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Ds D0 D1 D2 D3
12.5 etu (11.5 etu in block transfer mode)
23. Serial Communications Interface (SCIg, SCIh)
D4 D5 D6 D7
11.0 etu
Dp DE
Guard
time
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