Status Register (Str) - Renesas RX100 Series User Manual

RX13T Group
23.2.27

Status Register (STR)

Address(es): SCI12.STR 0008 B327h
b7 b6
— —
Value after reset: 0 0
Bit Symbol Bit Name
b0 BFDF Break Field Low Width
Detection Flag
b1 CF0MF Control Field 0 Match
Flag
b2 CF1MF Control Field 1 Match
Flag
b3 PIBDF Priority Interrupt Bit
Detection Flag
b4 BCDF Bus Collision Detected
Flag
b5 AEDF Valid Edge Detection
Flag
b7, b6 — Reserved
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5 b4 b3 b2
AEDF BCDF PIBDF CF1MF CF0MF BFDF
0 0 0 0
Description
[Setting conditions]
 Detection of the low width for a Break Field
 Completion of the output of the low width for a Break Field
 Underflow of the timer
[Clearing condition]
 Writing 1 to the BFDCL bit in STCR
[Setting condition]
 A match between the value received in Control Field 0 and the set value.
[Clearing condition]
 Writing 1 to the CF0MCL bit in STCR
[Setting condition]
 A match between the data received in Control Field 1 and the set values.
[Clearing condition]
 Writing 1 to the CF1MCL bit in STCR
[Setting condition]
 Detection of the priority interrupt bit
[Clearing condition]
 Writing 1 to the PIBDCL bit in STCR
[Setting condition]
 Detection of the bus collision
[Clearing condition]
 Writing 1 to the BCDCL bit in STCR
[Setting condition]
 Detection of a valid edge
[Clearing condition]
 Writing 1 to the AEDCL bit in STCR
These bits are read as 0. The write value should be 0.
23. Serial Communications Interface (SCIg, SCIh)
b1 b0
0 0
R/W
R
R
R
R
R
R
R
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