Renesas RX100 Series User Manual page 813

32-bit mcu
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RX13T Group
 Flush-right format (in A/D-converted value addition mode and when number of conversions is selected for 16
times)
The value added by the A/D-converted value of the same channel is stored in bits 15 to 0.
 Flush-left format (in A/D-converted value addition mode and when number of conversions is selected for 1 to 4
times)
The value added by the A/D-converted value of the same channel is stored in bits 15 to 2.
Bits 1 and 0 are read as 0.
 Flush-left format (in A/D-converted value addition mode and when number of conversions is selected for 16 times)
The value added by the A/D-converted value of the same channel is stored in bits 15 to 0.
When A/D-converted addition mode is selected, the value added by the A/D-converted value of the same channel is
indicated. The number of A/D conversions can be set to 1, 2, 3, 4, or 16 times. If A/D-converted addition mode is
selected, when the conversion count is set to 1 to 4 times, the value added by the A/D conversion result is retained in the
A/D data register as 2-bit extended data of the conversion accuracy bits; when the conversion count is set to 16 times, the
value added by the A/D conversion result is retained in the A/D data register as 4-bit extended data of the conversion
accuracy bits. Even if A/D-converted value addition mode is selected, the value is stored in the A/D data register
according to the settings of the A/D data register format select bits.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
26. 12-Bit A/D Converter (S12ADF)
Page 813 of 1041

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