Normal Transfer Mode - Renesas RX100 Series User Manual

32-bit mcu
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16.4.3

Normal Transfer Mode

This mode allows 1-byte, 1-word, or 1-longword data transfer on a single transfer request. The transfer count can be set
to 1 to 65536.
Transfer source addresses and transfer destination addresses can be set to increment, decrement, or fixed independently.
This mode enables an interrupt request to the CPU to be generated at the end of specified-count transfer.
Table 16.6 lists register functions in normal transfer mode, and Figure 16.6 shows the memory map of normal transfer
mode.
Table 16.6
Register Functions in Normal Transfer Mode
Register
Description
SAR
Transfer source address
DAR
Transfer destination address
CRA
Transfer counter A
CRB
Transfer counter B
Note 1. Write-back operation is skipped when the MRA.WBDIS bit is 1.
Note 2. Write-back operation is skipped when address is fixed.
SAR
Figure 16.6
Memory Map of Normal Transfer Mode
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Transfer source data area
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Value Written Back by Writing Transfer Information*
Increment/decrement/fixed*
Increment/decrement/fixed*
CRA – 1
Not updated
Transfer destination data area
Data 1
Transfer
Data 2
Data 3
Data 4
Data 5
Data 6
16. Data Transfer Controller (DTCb)
2
2
DAR
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