Data Arrangement In Memory; Notes On The Allocation Of Instruction Codes - Renesas RX100 Series User Manual

RX13T Group
2.5.4.2

Data Arrangement in Memory

Data in memory have three sizes: byte (8-bit), word (16-bit), and longword (32-bit). The data arrangement is selectable
as little endian or big endian. Figure 2.3 shows the arrangement of data in memory.
Data type Address
1-bit data
Address L
Byte data
Address L
Word data
Address M
Address M + 1
Longword data
Address N
Address N + 1
Address N + 2
Address N + 3
Figure 2.3 Data Arrangement in Memory
2.5.5

Notes on the Allocation of Instruction Codes

The allocation of instruction codes to an external space where the endian differs from that of the chip is prohibited. If the
instruction codes are allocated to the external space, they must be allocated to areas where the endian setting is the same
as that for the chip.
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Data image
(Little endian)
b7
7 6 5 4 3
MSB
MSB
MSB
b0 b7
2 1 0 7 6
LSB MSB
LSB MSB
LSB MSB
2. CPU
Data image
(Big endian)
b0
5 4 3 2 1 0
LSB
LSB
LSB
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