Dtc Transfer Request Enable Register N (Dtcern) (N = Interrupt Vector Number) - Renesas RX100 Series User Manual

32-bit mcu
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RX13T Group
14.2.6
DTC Transfer Request Enable Register n (DTCERn)
(n = interrupt vector number)
Address(es): ICU.DTCER027 0008 711Bh to ICU.DTCER255 0008 71FFh
b7
b6
Value after reset:
0
0
Bit
Symbol
Bit Name
b0
DTCE
DTC Transfer Request
Enable
b7 to b1
Reserved
See Table 14.3, Interrupt Vector Table , for the interrupt sources that are selectable as the DTC trigger.
DTCE Bit (DTC Transfer Request Enable)
When the DTCE bit is set to 1, the corresponding interrupt source is selected as the DTC trigger.
[Setting condition]
 When 1 is written to the DTCE bit
[Clearing conditions]
 When the specified number of transfers is completed (for the chain transfer, the number of transfers for the last
chain transfer is completed)
 When 0 is written to the DTCE bit
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b5
b4
b3
b2
0
0
0
0
Description
0: The corresponding interrupt source is not selected as the DTC
trigger.
1: The corresponding interrupt source is selected as the DTC trigger.
These bits are read as 0. The write value should be 0.
b1
b0
DTCE
0
0
14. Interrupt Controller (ICUb)
R/W
R/W
R/W
Page 205 of 1041

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